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Senior Principal ASIC Design Engineer

  • Company: Get A Job.ai
  • Salary: Pay not listed
  • Work type: Remote
  • Full Time
  • Remote

Website Get A Job.ai

Represented by Get A Job.ai

About This Opportunity

We are representing a confidential semiconductor organization at the forefront of AI infrastructure connectivity. Our talent team is seeking a Senior Principal ASIC Design Engineer to join their Germany-based engineering operation. This is a senior technical leadership position driving next-generation connectivity silicon for rack-scale AI systems.

You will architect and lead ASIC design for high-speed networking products spanning Ethernet, PCIe Gen 6/7, UALink, and UCIe technologies. This role combines deep technical execution with cross-functional leadership, mentorship, and strategic technical direction.

Responsibilities

  • Define ASIC architecture and microarchitecture for high-performance Ethernet controllers, network interface datapaths, packet processing pipelines, and AI interconnect subsystems
  • Lead RTL design and development for MACs, protocol engines, DMA subsystems, queue management, scheduling logic, and memory interfaces
  • Architect scalable solutions for data movement, congestion management, quality of service, flow control, and transport reliability
  • Design hardware acceleration for RDMA, protocol offloads, virtualization, multi-tenant isolation, and zero-copy mechanisms
  • Drive tradeoff analysis across performance, power, area, latency, scalability, and programmability dimensions
  • Partner with firmware and software teams to define hardware/software interfaces for initialization, management, telemetry, and diagnostics
  • Lead execution from architecture through RTL integration, verification, synthesis, timing closure, tapeout, and post-silicon validation
  • Serve as technical authority across digital design, networking architecture, and system integration domains
  • Mentor senior engineers and provide technical leadership across multiple product programs

What We're Looking For

Required Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
  • 12+ years of ASIC/SoC design experience with proven track record delivering complex networking or connectivity silicon from architecture through production
  • Deep expertise in RTL design and microarchitecture for high-performance networking ASICs
  • Extensive experience designing Ethernet controllers, MACs, NIC architectures, packet processing engines, or network interface subsystems
  • Strong knowledge of RDMA architectures and transport protocols such as RoCE, InfiniBand, or similar low-latency networking technologies
  • Hands-on experience designing packet parsing, scheduling, buffering, DMA, queue management, flow control, congestion management, and transport acceleration hardware
  • Deep understanding of high-speed interconnects including Ethernet, PCIe, and AI scale-up fabrics
  • Complete ASIC flow experience: architecture, RTL design, integration, synthesis, timing closure, physical implementation, tapeout, and post-silicon bring-up
  • Demonstrated technical leadership across multiple teams and product programs
  • Location: Germany (on-site)

Preferred Qualifications:

  • Master's or PhD in Electrical Engineering, Computer Engineering, or related discipline
  • Direct experience with UALink, UCIe, PCIe Gen 6/7, and advanced Ethernet protocols
  • Experience designing SmartNICs, DPUs, switch datapaths, or Ethernet-based scale-up networking for AI/HPC systems
  • Track record leading architecture or design for multiple successful advanced-node ASIC tapeouts
  • Strong communication, collaboration, and mentorship capabilities

How We Work With You

Candidates apply directly through Get A Job.ai. Our recruiting team will conduct an initial screening to understand your background and ensure alignment with the role requirements. Qualified candidates are then presented to our client for consideration. Please do not attempt to contact the client organization directly, as all communication is managed through our talent team to ensure a professional and coordinated process.

Pay

Compensation details will be discussed during the screening process based on experience and qualifications.

Get A Job.ai is an equal opportunity recruiter. We encourage applications from candidates of all backgrounds, including people of color, LGBTQ+ and non-binary individuals, veterans, parents, and individuals with disabilities.

Apply with Get A Job.ai

A recruiter will review your profile and submit you to the client. Do not contact the client directly.

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Apply with Get A Job.ai

Apply through Get A Job.ai. A recruiter will review your profile and submit you. Do not contact the client directly.

Apply through Get A Job.ai. A recruiter will review your profile and submit you.

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Listing facts

  • Role Senior Principal ASIC Design Engineer
  • Employer Get A Job.ai
  • Location Remote
  • Type Full Time
  • Pay (from listing) Pay not listed
  • Posted September 13, 2026
  • Apply by October 13, 2026
  • Overview Full job description on this page (526 words)

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