Senior Physical Design Engineer

Bitdeer Technologies Group invites experienced professionals to apply for the Senior Physical Design Engineer role based in Singapore. This full-time opportunity supports candidates ready to contribute deep technical expertise in physical design to our collaborative team in Singapore.

About This Position

The Senior Physical Design Engineer at Bitdeer Technologies Group in Singapore takes ownership of end-to-end physical implementation for complex digital designs. This position focuses on delivering high-quality layouts that meet performance, power and area targets while collaborating closely with front-end, verification and packaging teams. Suitable for engineers seeking a senior-level challenge in Singapore, the role emphasises technical leadership, methodical problem-solving and continuous process refinement in a professional engineering environment.

Key Responsibilities

• Execute full-chip and block-level physical design flows including floorplanning, power planning, placement, clock-tree synthesis, routing and sign-off checks.
• Drive timing closure, congestion resolution and power optimisation across multiple process and voltage corners using industry-standard EDA tools.
• Perform physical verification (DRC, LVS, ERC), IR-drop analysis and electromigration checks to ensure design integrity and manufacturability.
• Develop and maintain reusable scripts, methodologies and design guidelines that improve throughput and quality for future projects.
• Interface with logic design, DFT and packaging engineers to resolve interface issues and incorporate ECO changes efficiently.
• Mentor junior engineers, conduct design reviews and contribute to continuous improvement of signed-off flows and best practices.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering or a closely related discipline.
• Significant hands-on experience as a Physical Design Engineer with proven delivery of tape-out ready ASICs or SoCs on advanced process nodes.
• Expert-level proficiency with leading physical design platforms such as Cadence Innovus, Synopsys Fusion Compiler or equivalent place-and-route tools.
• Strong command of static timing analysis, timing constraint development, power network design and multi-corner multi-mode sign-off methodologies.
• Familiarity with scripting languages (Python, Tcl, Perl) for automation of design and verification tasks.
• Excellent analytical skills, attention to detail and the ability to communicate technical decisions clearly within a multi-disciplinary team based in Singapore.

Working at Bitdeer Technologies Group

Bitdeer Technologies Group is hiring for this role and offers a supportive team environment where engineers can grow their expertise and make meaningful contributions in Singapore.

How to Apply

To apply, complete your application directly on this page, or you'll be redirected to the employer's application platform to finish submitting there.