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Expect deep dives on memory bandwidth vs capacity, bank conflicts, QoS for multi-tenant AI inference/training, ECC/reliability at scale, and how memory choices affect Bitdeer-style high-density compute. Prepare whiteboards on HBM stacks, NoC/memory fabric, and tradeoffs under power and cost caps.
Strong fit if you have hands-on memory architecture for NPUs/AI accelerators and want Singapore-based work at a public mining-and-AI infra builder expanding manufacturing and silicon-adjacent capability. Thin public role data—push for team scope and tape-out stage in process.
As Memory Subsystem Architect (NPU) at Bitdeer, a typical day centers on defining on-chip/off-chip memory hierarchy for neural processing units that power mining and AI infrastructure workloads: bandwidth/latency budgets, SRAM/DRAM/HBM tradeoffs, coherency and interconnect with compute arrays, power/thermal constraints in dense racks, and reviews with silicon, firmware, and data-center teams so designs scale from die to fleet.
Prioritize NPU/accelerator architecture, memory controllers and hierarchies (cache, HBM, DDR), performance modeling, RTL/SoC co-design literacy, and power-aware system thinking. No listed cert path in source data—depth in memory subsystem papers and prior NPU/GPU/ASIC work matters more than generic badges.
No. The listing is Singapore-based with remote flagged off, so plan for local presence.
Crypto mining and AI cloud infrastructure, with large hashrate fleets and data centers, plus recent moves into advanced electronics manufacturing.
None in the provided cert data; experience in NPU memory subsystems is the practical bar.
Website: bitdeer.com
Bitdeer Technologies Group, or simply Bitdeer, is a cryptocurrency mining and artificial intelligence (AI) cloud infrastructure company headquartered in Singapore and listed on the Nasdaq under the ticker BTDR. The company was spun off from bitcoin-mining chip producer Bitmain in January 2021 by founder Jihan Wu. Bitdeer is among the largest cryptocurrency miners by computing power and operates data centers in the United States, Norway, and Bhutan, with U.S. headquarters in San Jose, California. Since 2023, the company has expanded into AI cloud services through a partnersh…
Public cache only — not an employee review.
Bitdeer Technologies Group is hiring a Memory Subsystem Architect (NPU) for a full-time role based in Singapore. This position suits experienced professionals searching for Memory Subsystem Architect (NPU) jobs in Singapore or Memory Subsystem Architect (NPU) near me opportunities within Bitdeer Technologies Group careers. About This Position As a full-time Memory Subsystem Architect (NPU) in Singapore, you will lead the definition and refinement of memory architectures that support neural processing units. You will balance performance, power, area and bandwidth targets while collaborating across design teams. The role focuses on end-to-end ownership of the memory subsystem from concept through implementation guidance, making it ideal for candidates targeting Memory Subsystem Architect (NPU) positions near Singapore. Your Responsibilities Define memory hierarchy, interconnect and controller architectures optimised for NPU workloads Analyse bandwidth, latency and power trade-offs for on-chip and off-chip memory solutions Develop high-level models and micro-architectural specifications for caches, buffers and memory interfaces Collaborate with system architects, RTL designers and verification teams to ensure seamless integration Evaluate emerging memory technologies and protocols for suitability in next-generation NPU designs Guide floor-planning, floorplan constraints and performance projection activities related to the memory subsystem Document architectural decisions and present findings to cross-functional stakeholders Requirements Proven track record as a Memory Subsystem Architect (NPU) or equivalent role in advanced semiconductor design Deep expertise in memory subsystems, including SRAM, DRAM, HBM and related high-bandwidth interfaces Strong understanding of NPU dataflow, tensor operations and memory access patterns Proficiency with architecture modelling, performance simulation and trade-off analysis tools Familiarity with SoC integration, clocking, power domains and physical design considerations Excellent communication skills for aligning multi-disciplinary teams Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering or a related field, or equivalent practical experience Working at Bitdeer Technologies Group Bitdeer Technologies Group is hiring for this role and offers a supportive team environment. How to Apply To apply, complete your application directly on this page, or you'll be redirected to the employer's application platform to finish submitting there.
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